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My ICIP 2006 Schedule
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Paper Detail
| Paper: | WP-P7.10 |
| Session: | Implementation of Image & Video Processing Systems |
| Time: | Wednesday, October 11, 14:20 - 17:00 |
| Presentation: |
Poster |
| Topic: |
Implementation of Image & Video Processing Systems: Hardware and software co-design |
| Title: |
COMPUTATION ERROR TOLERANCE IN MOTION ESTIMATION ALGORITHMS |
| Authors: |
Hye-Yeon Cheong; University of Southern California | | | | | In Suk Chong; University of Southern California | | | | | Antonio Ortega; University of Southern California | | |
| Abstract: |
In this paper we study the computation error tolerance properties of motion estimation algorithms. We are motivated by two scenarios where hardware systems may introduce computation errors. First, we consider hardware faults such as those arising in typical fabrication process. Second, we consider "soft" errors due to voltage scaling, which can arise when operating at a lower voltage than specified for the system. Current practice is to discard all faulty systems. However there is an increasing interest in tools that can identify faulty systems which provide acceptable performance. We show that motion estimation (ME) algorithms exhibit significant error tolerance in these two scenarios. We propose simple error models and use these to provide insights into what features in these ME algorithms lead to increased error tolerance. Our comparison of the full search ME and a state of the art fast ME approach in the context of H.264/AVC shows that while both techniques are error tolerant, the faster algorithm is in fact more robust to computation errors. |
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